CDM4-650 TR13 PBFREE 数据手册
CDM4-650
SURFACE MOUNT SILICON
N-CHANNEL
MEDIUM POWER MOSFET
4.0 AMP, 650 VOLT
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DESCRIPTION:
The CENTRAL SEMICONDUCTOR CDM4-650 is a
650 volt N-Channel MOSFET designed for high voltage,
fast switching applications such as Power Factor
Correction (PFC), lighting and power inverters. This
MOSFET combines high voltage capability with low
rDS(ON), low threshold voltage, and low gate charge for
optimal efficiency.
MARKING: FULL PART NUMBER
DPAK CASE
APPLICATIONS:
• Power Factor Correction
• Alternative energy inverters
• Solid state lighting
FEATURES:
• High voltage capability (VDS=650V)
• Low gate charge (Qgs=3.0nC)
• Low rDS(ON) (2.44Ω)
MAXIMUM RATINGS: (TA=25°C unless otherwise noted)
SYMBOL
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Continuous Drain Current (Steady State)
ID
Maximum Pulsed Drain Current, tp=10μs
IDM
Continuous Source Current (Body Diode)
IS
Maximum Pulsed Source Current (Body Diode)
ISM
Single Pulse Avalanche Energy (Note 1)
EAS
Power Dissipation
PD
Power Dissipation (TC=25°C)
PD
Operating and Storage Junction Temperature
TJ, Tstg
Thermal Resistance
ΘJC
Thermal Resistance
ΘJA
650
30
4.0
16
4.0
16
202
0.62
77
-55 to +150
1.62
110
ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
IGSSF, IGSSR VGS=30V, VDS=0
10
IDSS
VDS=650V, VGS=0
0.03
BVDSS
VGS=0, ID=250μA
650
VGS(th)
VGS=VDS, ID=250μA
2.0
3.4
VSD
VGS=0, IS=4.0A
0.87
rDS(ON)
VGS=10V, ID=2.0A
2.44
Crss
VDS=25V, VGS=0, f=1.0MHz
1.0
Ciss
VDS=25V, VGS=0, f=1.0MHz
463
Coss
VDS=25V, VGS=0, f=1.0MHz
60
MAX
100
1.0
4.0
1.4
2.7
UNITS
V
V
A
A
A
A
mJ
W
W
°C
°C/W
°C/W
UNITS
nA
μA
V
V
V
Ω
pF
pF
pF
Notes: (1) L=30mH, IAS=3.6A, VDD=50V, RG=25Ω, Initial TJ=25°C
R3 (2-July 2014)
CDM4-650
SURFACE MOUNT SILICON
N-CHANNEL
MEDIUM POWER MOSFET
4.0 AMP, 650 VOLT
ELECTRICAL
SYMBOL
Qg(tot)
Qgs
Qgd
td
tr
ts
tf
trr
Qrr
CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted)
TEST CONDITIONS
TYP
UNITS
VDS=520V, VGS=10V, ID=4.0A (Note 2)
11.4
nC
VDS=520V, VGS=10V, ID=4.0A (Note 2)
3.0
nC
VDS=520V, VGS=10V, ID=4.0A (Note 2)
4.7
nC
VDD=325V, ID=4.0A, RG=25Ω (Note 2)
9.0
ns
VDD=325V, ID=4.0A, RG=25Ω (Note 2)
23
ns
VDD=325V, ID=4.0A, RG=25Ω (Note 2)
23
ns
VDD=325V, ID=4.0A, RG=25Ω (Note 2)
21
ns
VGS=0, IS=4.0A, di/dt=100A/μs (Note 2)
266
ns
VGS=0, IS=4.0A, di/dt=100A/μs (Note 2)
2.24
μC
Notes: (2) Pulse Width < 300μs, Duty Cycle < 2%
DPAK CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Gate
2) Drain
3) Source
4) Drain
Pin 2 is common to the tab (4)
MARKING: FULL PART NUMBER
R3 (2-July 2014)
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CDM4-650
SURFACE MOUNT SILICON
N-CHANNEL
MEDIUM POWER MOSFET
4.0 AMP, 650 VOLT
TYPICAL ELECTRICAL CHARACTERISTICS
R3 (2-July 2014)
w w w. c e n t r a l s e m i . c o m
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